Up to now, as error detection means for a computer device having a PCI bus, there were provided a method of asserting a SERR (System ERRor) signal on detection of a parity error of an address, a method of asserting PERR (Parity ERRor) on detection of a parity error of a data, and a method of terminating a transfer by a target abort on detection of other errors by a PCI target device.